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Re: XT-IDE on PCjr
Posted: Sun Sep 04, 2011 8:40 am
by alanh
OK, I'm at a bit of a cross-roads on how to proceed. Using some rough test code I've started proving out different pieces of the board so I can be a little more confident the next spin of the board will not have any other show-stopper problems.
- The RTC works. I wrote a quick utility to set DOS time from RTC and vice-versa and have it running in my floppy boot autoexec.bat. No more setting my Jr's clock manually!
- RAM works. I did an extensive pattern and aliasing check of the lower 736K. I haven't turned on the other remap regions yet, but I'm sure that part will work since the lower RAM map is good. The other remaps may also be moot if there isn't a UMB driver in PC-DOS 5.x
- POST works. I just had to change the part choice from a low power part to a normal one and cut the pulse width down some. The ASL part was getting very hot and I burned a couple out. I also changed the hex decoder so that 0x00 doesn't drive any segment. That way it can be turned off when not in use.
- IDE 'works'. Other than the connector being backwards which I'm currently working around with a cable. It's memory mapped and has Chuck(G)'s mod in both read and write directions. I can write a drive ID command to the drive and I get back a valid ID sector that looks like it supposed to (w/ Vendor name and proper geometry). I haven't tried to exercise it extensively. I was hoping to change the XT-IDE BIOS to work with the new access patterns, but I'm now looking at the code and it isn't as straight forward as I had hoped. It's been 20 years since I did much x86 assembler. It seems everything is localized to IdeIO.asm and IdeTransfer.asm however I think it would take me a lot of tries to get it correct without interactive help from someone.
- I haven't tried reflashing from DOS yet. This was going to be next after IDE prove out. Now I'm thinking it might need to be before. Currently to update the BIOS, I'm popping the flash chip out of socket and using a DIP programmer. I think IDE and BIOS in general might be a rocky road so this is moving up in priority.
The main problem is I have other commitments the next 2-3 days. I was prepared to drop things today and if it looked like I could have my JR booting up from the HD by the end of today. But it seems the IDE code will take longer than that.. Especially popping chips. So I may have to punt until later in the week or even next weekend. Which also means another week to make the necessary board changes for the next spin (+3 weeks from then to get the boards in).
So progress is slow...
Re: XT-IDE on PCjr
Posted: Sun Sep 04, 2011 2:42 pm
by alanh
It seems as if either A17, A18, A19, MEMRD, or MEMWR going to the side-car expansion slot is gated off on the motherboard somewhere whenever the CS lines go active to the cartridge slots. I'm not sure why IBM wanted to do this as it takes active circuitry to do it (buffer w/ strobe exclusion conspiratorial logic) and limits the expand ability of the side car interface. I may just have a bug in the RAM remap logic, but I've simplified much of it as a test and still can't RAM fill those regions while no cartridges are installed (which means I can't ROM fill them either).
Going to work on the rest and come back to this. If it's still not working, I may drop the RAM fill to a 512KB chip and a 128KB chip for 128->736 RAM fill only. Alternatively if I remapped A14->19 on the RAM chips, I suppose the unused 544KB of the 1MB could be used as a RAM disk, but I think I'd rather simplify the design to get it done.
Speaking of bells and whistles though. I added one using unused cells on the 2nd PLD. The decimal place LEDs on the POST 7-segment now ping back and forth at a rate determined by using A1 as a clock through a 16-bit clock divider. The ping-pong display actually speeds up and slows down based on the fetch patterns of the code that is running. There is also another register defined to turn off POST display and the ping-pong activity as well as independently hold the HD in reset w/o resetting the main-board.
I'm really starting to miss having a NIC on the JR. Floppy net is getting old. If I can ever get round 2 spun and successful, maybe a NIC + NS16550 serial port sidecar is in the future!
Re: XT-IDE on PCjr
Posted: Sun Sep 04, 2011 5:32 pm
by Brutman
IDE: If you can ID the drive and get valid data back most of the work is done. I presume you are doing this with some test code, not the XT-IDE code. The default XT-IDE code has some bad memory locations in use so it will ID a connected drive but not boot.
I have a slightly cleaner version of the XT-IDE BIOS here on my Jr - I removed the multiple card support, moved some memory addresses around, and added a chicken switch to abort the init of the BIOS. (The presence of the BASIC cartridge is the trigger.) I'm working on getting it cleaned up so that I can pass it to you. (Hargle needs to review it first for other, non-technical issues.)
I don't understand the issue with the address lines on the sidecar bus. You are saying that even with no cartridges installed that you can't get anything recognized in the higher address space? The speech adapter sidecar and my Western Digital Ethernet card all hang off the I/O bus, add ROM or RAM, and are addressable. I can scan the relevant pages.
Having a NIC is just, well, awesome. I've devoted quite a bit of time to making FTP and Telnet useful on a Jr.
Mike
Re: XT-IDE on PCjr
Posted: Sun Sep 04, 2011 6:33 pm
by alanh
IDE: Yes all the IDE code is just in a dinky test app (eg. send 0xec to the command register, read back and dump the sector). Yeah, most of the work is done. However given the number of specific features to JR-IDE and not needing most of the general features of XT-IDE, it might be better to fully customize the BIOS. That's really between you and Jeff. ATM I'm just working towards getting a 2nd board spin that's nearly 100% on delivery. BIOS can come once you guys build up your boards. Though I am writing a rough framework for a BIOS in C using OWC and custom linker scripts and assembly wrappers. It can remain a test tool or could serve as the basis for an entirely new BIOS going forward. Again up to you guys. I'm just way more comfortable boot-strapping to C for the meat of my embedded projects. And I have an affinity to OWC, WASM, and NASM since they all run on Linux hosts.
RAM: I've spend a lot of time tonight trying to get RAM fill to work in the 0xd0000 -> 0xeffff memory ranges. It works for 0xc0000->0xcffff. I've been able to back-fill the option ROM windows that aren't populated so I'm fairly sure it's not a PLD or hardware bug at this point. Now it is possible that only the write strobe is gated off while those addresses are active - however I'm not sure why since there is only supposed to be ROM mapped there. Maybe the folks at IBM were paranoid of stray writes to cartridges even though the strobe isn't even on the cartridge card edges. Are you positive you are able to write as well as read from cartridge address space hosted from side-cars?
Re: XT-IDE on PCjr
Posted: Sun Sep 04, 2011 9:39 pm
by alanh
It also appears I'm not going to be able to replace the MB ROM chips with pages from side-car flash. I was hoping this would allow people to copy the JR BIOS into either an A or B image in flash (dip switch select-able) to facilitate either patching your JR BIOS or developing a new one. I checked and rechecked that I had a perfect shadow of the BIOS chips (even dumped them externally too) at the start of flash. Double checked the flash was programmed correctly - both in-circuit and external. Even stripped out every bit of PLD code except for basically - if MEMRD & A19 & A18 & A17 & A16 => assert the flash CS... and no luck. Something odd is going on with strobes in the ROM ranges.
Once I get more time, I'll put a logic analyzer on the relevant signals and trace things out. For now, I'm satisfied that I can hit all 512KB of flash pages through a programmable window and flash them all.
Here's my current issue list that is holding up the next board spin:
- Bug with flash remap window address only allows it to exist at C8000 and C0000 (not C4000 and CC000).
- Logic trace ROM addressing windows (only really affects what to put on silkscreen for DIP switch 3)
- Prove I can manually (via test util) write to any arbitrary HD CHS and read back the sector in-tact
- Make necessary changes to schematic and board layout:
a. Add more ground coupling vias
b. (potentially) Change 2nd RAM chip to 128KB - maybe a BOM only change
c. Correct up-side-down IDE connector layout
d. Increase drills for side-car IDC connector (to what?)
e. Verify JTAG parallel port cables work with Atmel ISP 6.x
f. Investigate chaining JTAG headers if RAM chip change allows more cross board route room
g. BOM change : Use ATF1504AS for U6 (instead of ATF1502ASL - out of stock at Digikey)
h. BOM change : Use 330 ohm LED 7 seg resistor array (instead of 220 ohm)
I'm out of time this weekend. I'm hoping to get back to it sometime between mid-week and next weekend. I'll keep posting as I can now see some light at the end of the tunnel.
Re: XT-IDE on PCjr
Posted: Mon Sep 05, 2011 9:12 am
by Brutman
The reserved cartridge areas might be read only - my Western Digital card maps a RAM buffer, but it does it in the expansion ROM area (C000:0000). I remember having problems with it when I had it at D000:0000 - I will try that again.
Mike
Re: XT-IDE on PCjr
Posted: Tue Sep 06, 2011 5:25 am
by alanh
The upper address lines and control strobes come directly off buffers in-front of the CPU. The only other possibility I see (besides a side-car bug), are latches, not buffers, that are potentially driving the bus through a buffer that separate the ROMs, carts, and video RAM (the 'X' signal variants). It means the 'X' buffers are able to supply enough current and there is enough impedance between them and the RAM parts (that are sinking after a write to 0x00) there is still enough voltage at the CPU buffer to register a 1. I'll try and prove this theory tonight by alternating reads from system rom and the space where the cartridges should be and see if the values track.
Re: XT-IDE on PCjr
Posted: Tue Sep 06, 2011 5:45 am
by Brutman
I'm not sure if you noticed, but you should have the motherboard schematics in your email ...
Re: XT-IDE on PCjr
Posted: Tue Sep 06, 2011 5:47 am
by alanh
Yeah. Thanks. I have the printed manual but it's an hour away at the house. Thanks for sending it
Re: XT-IDE on PCjr
Posted: Thu Sep 08, 2011 10:23 pm
by alanh
While trying to exercise the ATA access, I had the thought of timing sector reads (at an ATA command/register level). To my surprise, I'm only getting about 68 KB/s reading 63 sectors at a time (1 head). Watcom is doing a horrible job at optimizing:
Code: Select all
static void _xfer_sectors (uint16_t cyl, uint8_t head, uint8_t count, uint16_t far *ptr)
{
uint16_t total = count * 256;
ide_window16[IDE_REG_ADDR_CYL_L] = cyl & 0xff;
ide_window16[IDE_REG_ADDR_CYL_H] = cyl >> 8;
ide_window16[IDE_REG_ADDR_HEAD] = 0xa0 | head;
ide_window16[IDE_REG_SEC_COUNT] = count;
ide_window16[IDE_REG_ADDR_SEC] = 1;
ide_window16[IDE_REG_COMMAND] = 0x20;
#if 0
do
{
tmp = ide_window8[IDE_REG_STATUS*2];
if (!(tmp & 0x80))
break;
if (tmp & 0x08)
*ptr = ide_window16[IDE_REG_DATA];
total--;
ptr++;
} while (total);
while (total)
{
*ptr = ide_window16[IDE_REG_DATA];
total--;
ptr++;
}
#else
while (!(ide_window8[IDE_REG_STATUS*2] & 0x08));
do
{
*ptr = ide_window16[IDE_REG_DATA];
total--;
ptr++;
} while (total);
#endif
return;
}
Results in:
Code: Select all
_xfer_sectors_:
push cx
push si
push di
push bp
mov bp,sp
sub sp,2
mov cx,ax
mov dh,dl
mov dl,bl
mov bx,word ptr 0aH[bp]
mov ah,dl
xor al,al
mov si,cx
and si,0ffH
mov word ptr -2[bp],si
les si,dword ptr _ide_window16
mov di,word ptr -2[bp]
mov word ptr es:8[si],di
mov cl,ch
xor ch,ch
mov word ptr es:0aH[si],cx
mov cl,dh
or cl,0a0H
mov word ptr es:0cH[si],cx
xor dh,dh
mov word ptr es:4[si],dx
mov word ptr es:6[si],1
mov word ptr es:0eH[si],20H
les si,dword ptr _ide_window8
L$1:
test byte ptr es:0eH[si],8
je L$1
L$2:
les si,dword ptr _ide_window16
mov dx,word ptr es:[si]
mov es,word ptr 0cH[bp]
mov word ptr es:[bx],dx
dec ax
add bx,2
test ax,ax
jne L$2
mov sp,bp
pop bp
pop di
pop si
pop cx
ret 4
I'm not really sure how to make it aware it can temporarily re-assign ds for the copy; though in the BIOS call setup, ide_window will be near pointer relative to DS anyway. I suppose I could just code things up for a proof of concept for the next board spin (eg get DOS booting this weekend) and either go back and try and mod the XT-IDE code or hand optimize this. I was hoping the Watcom real mode compiler would do a better job. I hope I'm just missing something.