JrIDE POST display & burn-out

Hardware questions and modifications

JrIDE POST display & burn-out

Postby alanh » Wed Nov 20, 2013 5:27 am

I haven't powered on my Jr in a while or updated the BIOS so I'm not sure if this is still a problem. I just wanted to warn about potential early aging of 2nd PLD if you leave the POST display on all the time. The ATF1504 driving the LEDs both source and sink the display current. It used to get really hot until I increased the PWM rate. It's probably not a good idea to leave it on past the actual BIOS code. Port 72H controls the enable for the POST display. From the PLD code:

Code: Select all
 * The PLD register map follows:
 *
 * I/O 0x10 : Dual 4-bit hex decoder to 7-segment LED displays
 * I/O 0x70 : Maxim DS12C887 RTC register address latch
 * I/O 0x71 : Maxim DS12C887 RTC register read/write data
 * I/O 0x72 bit 0 : Left POST digit enable = 0 / disable = 1
 *          bit 1 : Right POST digit enable = 0 / disable = 1
 *          bit 2 : Decimal point bus activity enable = 0 / disable = 1
 *          bit 3 : Independent IDE reset 1 = reset asserted (low)
 *                                        0 = reset inactive (high)
 *          bit 4-7 : Reserved


Make sure the POST display gets switched off as the last step of the BIOS code.
alanh
 
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Re: JrIDE POST display & burn-out

Postby Brutman » Wed Nov 20, 2013 12:41 pm

Hi Alan,

The current version of the BIOS shuts the post display off as you suggest. I got that tip from you almost a year ago and I incorporated it into the BIOS quickly after you told me about it.

Everybody else - if you have not updated to the current BIOS then this is another reason to do so.
Brutman
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Re: JrIDE POST display & burn-out

Postby Vorticon » Fri Nov 22, 2013 12:46 pm

Mike, it looks like I don't have the latest BIOS because the POST display stays on on my system.
Where can I find the latest BIOS again?

Never mind. Found it.
Vorticon
 
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