XT-IDE on PCjr

[jmetal88]

I mean the symbol shows pins 14 to 23 as output only. I know in reality they are configurable.

[alanh]

Couple other optimizations:

A) Take hargle's advice and drop the extra small RAM. Eliminates components and is unneeded.
B) Where one PAL is good, two are better. The first can do the comparison of A17=0, A18=1, A19=1. Route A4..9, A13..16, IO/M, and the 8 selects from the DIP switch/pull-up bank into a second PAL and basically use it as a large comparator to generate the initial chip select indicators. Then cascade those in place of CS_IDE, IOM, and MIO back into the first PAL. That eliminates both comparators and a resistor network (leaving 1 x8).
C) The only other 74xx logic IC left is a hex inverter of which only one is in use for IDE reset. Replace it with a couple resistors and a discrete NPN.

The whole design just condensed into 8 ICs (vs 15), 1 RN (vs 2), 6 Rs (vs 2), and 8 decoupling caps. But at the expense of having to program ICs as part of the kit.

[Hargle]

The whole design just condensed into 8 ICs (vs 15), 1 RN (vs 2), 6 Rs (vs 2), and 8 decoupling caps. But at the expense of having to program ICs as part of the kit.

I think this is perfectly acceptable. Even if everyone out there had to go out and buy their own PAL programmer, it still might be cheaper than buying the extra 74xxx parts. IIRC, I picked up my PIC programmer for $5 shipped.

[alanh]

The danger of programmable devices is you can easily get carried away. The 22V10s are ~$2.50 each so they are not cheap and adding the second just to reduce the chip count by 2 is probably not cost effective. But it helps layout and power, allows the I/O address selection to be non-linear, and half the traditional circuit can now be changed simply by popping in a new PLD with different fuses. Could even consolidate both 22V10s into a single CPLD in a PLCC-44 socket and save an additional $2. But I'm not sure how far this path should be taken. For example with the CPLD design, the XT-IDE mk.2 speed improvement could have been made with a text editor instead of a soldering iron. However it may still be worthwhile to roll things back to all 74xx so users are more self sufficient. It's a tough call.

The cost of batching PLDs to program is fairly negligible. It's not like PCBs where NRE significantly varies the cost per quantity ordered. If jmetal88 goes that route, I'll order enough for a dozen boards or so, batch program them and send them to you for kits. Whenever they sell out, just pay the original purchase cost back then and rinse/repeat. Even 10 boards with 2 PLDs is < $50.

I did a layout of the 2 PLD board to see how things stacked up and the routing turned out pretty simple. Only needed a half dozen vias. I even went to 24mil traces across half the board (rest 16 mil). While doing it, I looked at the first XT-IDE PCB it looked like someone ball-parked the placement of chips and let the auto-router fly. I really don't like doing that. My only problem is I only have the non-commercial standard version of Eagle which will not do a full sidecar PCB and I am unfamiliar with KiCad. I plan on upgrading Eagle at some point, but not sure when that will be. And I certainly don't want to step on anyone toes. So jmetal88 is going to be the man for final layout.

Schematic
Pre-lim layout

I ordered lots of stuff from Mouser this weekend including PLDs of different flavors, a mix of 74xx DIPs, sockets and perf board. I planned on wiring up the XT-IDE mk.2 decode circuit, the PLD equivalent circuit, and logic testing them both with a micro. Hopefully next weekend. I just want to make sure WinCUPL isn't lying to me.

So who's all in on orders? I'm down for one (only have 1 Jr).

And what's the outlook on side car connectors? Gut an existing side car?

[Brutman]

I feel like I'm a bottleneck here .. I've got a prototype BIOS here and I've been using it on and off for two months. But I've not looked in detail at the second revision of the XT-IDE.

Looking at this from a software perspective - how are the registers laid out? (ie: How is it different than the first version?) I know they changed the addressing to make the 16 bits of the data latch appear as two consecutive 8 bit latches than can be read with a single word operation. What I/O ports are being used now?

[Hargle]

wow, time flies.
work has kept me in a vortex for quite awhile now.

anyway, i'll get the source code back from chuck and that should be a drop in replacement for whatever BIOS you've got right now. My code is so well written that I'm sure it was an extremely easy and isolated change to make.

the XTIDE mkII boards are expected to arrive in a week or so. Once I build one up, I can start experimenting with what will essentially be the core of IDEjr, and let you all know if we've got everything we need in the right place.

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alanh,
put me down for 2 of these cards. while I don't actually need two jrs, I have do have 2 of them, and there is no reason not to pimp them both out.
and, yes, gutting an existing sidecar will likely be required to get the connectors we need. (and the shell)

[jmetal88]

I'll be getting one of these. The whole reason I want one is so I don't have to keep a boot floppy in my Jr.

Also, I've gotta say, I'm really liking Dallas/Maxim right now. They just sent me two more samples, this time of the DS1511Y+.
These are the reasons I found it to be a desirable chip:
1: The data bus is eight bits wide. No need to worry about pulling four bits up or down.
2: The data and address signals are not multiplexed. It would be possible to connect this directly to the sidecar bus using simple address decode logic. It uses enough address space that it might be better to make it memory mapped somewhere in ROM space if it's directly connected, though.
3: Backup battery connects to a separate terminal. No need for voltage detection or external diodes on the Vcc pin.
4: Internal crystal (on this particular version of the chip).

Also, it has 256 bytes of battery-backed SRAM on the chip that I guess would normally be used to save CMOS settings on a PC. It isn't directly accessible, though - you have to write the address you want to access to register 10h of the DS1511Y+, then you can read or write whatever data you want in that spot. I'm not sure how useful these 256 bytes would be for us.

Anyway, the chip might still be too expensive an option for this project, but if it were the same price as other options, those would be the reasons for picking it. I'm still thinking about what the best way to hook up the 4-bit chip from Epson would be. That might be best put in I/O space with an 8255. The PCjr Booster uses a similar 4-bit chip (but not identical, the registers are in different places), and it's hooked to an 8255.
EDIT: Actually, I do have that driver source that I modified for use on the PCjr Booster. I bet if I hooked up the Epson chip to an 8255 in the same way as the board the driver was originally written for, it'd be a really simple modification to get the proper date and time using that driver.

[alanh]

jmetal88, where did you find the mechanicals for the board? (i.e. offsets for holes and connector)

[Spankmd]

I would be interest in 2 (possibly 3, based on cost) but would also like to see if anyone who isn't solder deficient could assemble them (for a fee, of course). And I agree, dumping the boot disk would make my Jr a whole world more enjoyable.

[jmetal88]

jmetal88, where did you find the mechanicals for the board? (i.e. offsets for holes and connector)

I didn't find them anywhere. I had to take apart a sidecar and measure. Then, I had to keep printing out the layout making small adjustments each time until it matched the actual board to the best of my ability.

EDIT: The board layout I posted here I don't think is the accurate one, I have a better one on my hard drive if you want it.