Re: XT-IDE on PCjr
Posted: Sun May 22, 2011 2:03 pm
On a PCjr 0x208 to 0x2F7 are open and 0x300 to 0x3CF are open. The only thing in the middle of any of that vast address range is the serial port.
On a PCjr any address between C000:0000 and C000:FFFF is available for BIOS ROM expansion. Although the Tech ref says the address space from D000:0000 to E000:FFFF is reserved for cartridges, I know that these addresses appear on the bus because my Western Digital 8003 Ethernet card maps itself in at D000:0000 for 8KB. (I need to verify this in the schematics too, just to be safe.)
Given that we have a wide array of I/O space and ROM space to choose from we should not be restricting ourselves to three switches through the existing hole of a particular sidecar. Three switches are not enough and people might be using a different sidecar shell that does not even have the hole.
We should be providing the same 16 selections that the XT-IDE provides, with the selection that overlays the onboard serial port considered to be a known user error. For an 8KB ROM we should be allowing the user to choose any 8K window in the range of C000:0000 to C000:FFFF and D000:0000 to D000:FFFF.
Swapping A0 and A3 should *only* be done on the data latches from the drive to make them appear linear in I/O port address space. I really don't want to see the "Chuck" mod duplicated entirely - as implemented on the existing XT-IDE it also swaps addressing for the ROM extension, meaning that you have to munge the binary for the EPROM before you download it. That's ugly and it's just going to lead to problems.
And I know I pointed this out before, but we really need 512 bytes or 1KB of RAM on the card too to avoid memory map conflicts with the BASIC interpreter and other reserved areas. We can either force that RAM into the existing 8KB address space that we are thinking of or extend the address space to something like 10KB, which still allows smaller ROM extensions to sneak into the unused space.
Sorry guys, but we need to make sure these high level problems are addressed first before drawing schematics.
On a PCjr any address between C000:0000 and C000:FFFF is available for BIOS ROM expansion. Although the Tech ref says the address space from D000:0000 to E000:FFFF is reserved for cartridges, I know that these addresses appear on the bus because my Western Digital 8003 Ethernet card maps itself in at D000:0000 for 8KB. (I need to verify this in the schematics too, just to be safe.)
Given that we have a wide array of I/O space and ROM space to choose from we should not be restricting ourselves to three switches through the existing hole of a particular sidecar. Three switches are not enough and people might be using a different sidecar shell that does not even have the hole.
We should be providing the same 16 selections that the XT-IDE provides, with the selection that overlays the onboard serial port considered to be a known user error. For an 8KB ROM we should be allowing the user to choose any 8K window in the range of C000:0000 to C000:FFFF and D000:0000 to D000:FFFF.
Swapping A0 and A3 should *only* be done on the data latches from the drive to make them appear linear in I/O port address space. I really don't want to see the "Chuck" mod duplicated entirely - as implemented on the existing XT-IDE it also swaps addressing for the ROM extension, meaning that you have to munge the binary for the EPROM before you download it. That's ugly and it's just going to lead to problems.
And I know I pointed this out before, but we really need 512 bytes or 1KB of RAM on the card too to avoid memory map conflicts with the BASIC interpreter and other reserved areas. We can either force that RAM into the existing 8KB address space that we are thinking of or extend the address space to something like 10KB, which still allows smaller ROM extensions to sneak into the unused space.
Sorry guys, but we need to make sure these high level problems are addressed first before drawing schematics.