Mike's PCjr Page

alanh wrote:The danger of programmable devices is you can easily get carried away. The 22V10s are ~$2.50 each so they are not cheap and adding the second just to reduce the chip count by 2 is probably not cost effective. But it helps layout and power, allows the I/O address selection to be non-linear, and half the traditional circuit can now be changed simply by popping in a new PLD with different fuses. Could even consolidate both 22V10s into a single CPLD in a PLCC-44 socket and save an additional $2. But I'm not sure how far this path should be taken. For example with the CPLD design, the XT-IDE mk.2 speed improvement could have been made with a text editor instead of a soldering iron. However it may still be worthwhile to roll things back to all 74xx so users are more self sufficient. It's a tough call.

The cost of batching PLDs to program is fairly negligible. It's not like PCBs where NRE significantly varies the cost per quantity ordered. If jmetal88 goes that route, I'll order enough for a dozen boards or so, batch program them and send them to you for kits. Whenever they sell out, just pay the original purchase cost back then and rinse/repeat. Even 10 boards with 2 PLDs is < $50.

I did a layout of the 2 PLD board to see how things stacked up and the routing turned out pretty simple. Only needed a half dozen vias. I even went to 24mil traces across half the board (rest 16 mil). While doing it, I looked at the first XT-IDE PCB it looked like someone ball-parked the placement of chips and let the auto-router fly. I really don't like doing that. My only problem is I only have the non-commercial standard version of Eagle which will not do a full sidecar PCB and I am unfamiliar with KiCad. I plan on upgrading Eagle at some point, but not sure when that will be. And I certainly don't want to step on anyone toes. So jmetal88 is going to be the man for final layout.

Schematic
Pre-lim layout

I ordered lots of stuff from Mouser this weekend including PLDs of different flavors, a mix of 74xx DIPs, sockets and perf board. I planned on wiring up the XT-IDE mk.2 decode circuit, the PLD equivalent circuit, and logic testing them both with a micro. Hopefully next weekend. I just want to make sure WinCUPL isn't lying to me.

So who's all in on orders? I'm down for one (only have 1 Jr).

And what's the outlook on side car connectors? Gut an existing side car?

alanh wrote:First I'm not sure why the XT-IDE schematic had them the way they did. There must have been a reason and until I find out why, I'm uncomfortable with my choices. They were pulling up/down outputs from the drive that were not connected on the controller end like DMA request. I don't see how that does anything but waist power. I only pulled up/down pins that we're inputs to the drive like DMA ack; eg. things the drive will examine that you don't want floating. Actually that schematic is incorrect. DMA ack should just be grounded and so should A14 on the ROM. The pull-downs to ground on something that will never be driven high are not needed.

I thought I remembered something from the ATA spec at one point that mentioned the significance of D7 during drive selection/sequencing, but now I can't find it. Until those issues can be clarified, I'd stick with the proven circuit from XT-IDE. (still remove the pull-down on ROM-A14).